用于多丝漂移室读出的扇入延迟前端电子学

程文静; 张钊; 易晗; 吕黎明; 肖志刚

doi:10.11889/j.0253-3219.2016.hjs.39.040403

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用于多丝漂移室读出的扇入延迟前端电子学

更新时间：2021-05-25

- 用于多丝漂移室读出的扇入延迟前端电子学
- Development of a fan-in and delay module for MWDC based on Flash-ADC acquisition scheme
- 核技术 2016年39卷第4期文章编号：040403
- 作者机构：
  
  清华大学物理系北京 100084
- 作者简介：
  
  程文静,女,1989年出生,2012年毕业于中山大学,现为硕士研究生,主要从事多丝漂移室探测器读出电子学领域的研究
  肖志刚,E-mail:xiaozg@tsinghua.edu.cn
- 基金信息：
  
  国家重点基础研究发展计划(973)项目(No.2014CB845405、No.2015CB856903)、国家自然科学基金(No.U1332207)资助()
- DOI：10.11889/j.0253-3219.2016.hjs.39.040403
  中图分类号： O571.6;TL8
- 收稿日期：2016-01-18，
  
  录用日期：2016-03-03，
  
  纸质出版日期：2016-04-25
- 稿件说明：
移动端阅览
程文静, 张钊, 易晗, 等. 用于多丝漂移室读出的扇入延迟前端电子学[J]. 核技术, 2016,39(4):040403

Wenjing CHENG, Zhao ZHANG, Han YI, et al. Development of a fan-in and delay module for MWDC based on Flash-ADC acquisition scheme[J]. Nuclear techniques, 2016, 39(4): 040403
程文静, 张钊, 易晗, 等. 用于多丝漂移室读出的扇入延迟前端电子学[J]. 核技术, 2016,39(4):040403 DOI： 10.11889/j.0253-3219.2016.hjs.39.040403.

Wenjing CHENG, Zhao ZHANG, Han YI, et al. Development of a fan-in and delay module for MWDC based on Flash-ADC acquisition scheme[J]. Nuclear techniques, 2016, 39(4): 040403 DOI： 10.11889/j.0253-3219.2016.hjs.39.040403.

摘要

多丝漂移室阵列是设计中的低温高密核物质测量谱仪(Cooling storage ring External-target Experiment

CEE)上的前角带电粒子径迹探测器

信号读出的一种备选方案是采用传统前置放大器和采样幅度数字转换器(Analog-to-Digital Converter

ADC)来完成信号的放大和获取

该方案结构较简单

成本适中

而且可以处理单根丝上的多重点火信号。为了进一步降低电子学的通道数目

而又不显著影响探测器的性能

研制了一种扇入延迟电路

将漂移室上不同的多根丝信号进行扇入延迟处理

合成为一路信号后再输入到采样ADC的单个通道进行波形采样和数字化。实际的测试结果表明

该电路对信号处理产生的信号能量展宽好于1%

时间晃动好于500 ps

对应的位置分辨好于25μm

满足漂移室径迹探测器阵列对位置分辨小于300μm的要求。

Abstract

Background:

Multi Wire Dr

ift Chamber(MWDC) array is the tracking detector at Cooling storage ring External-target Experiment(CEE) under design at Heavy Ion Research Facility at Lanzhou-Cooling Storage Ring(HIRFL-CSR). The physical goal of CEE aims at the studies of the equation of state of nuclear matter at low temperature but high baryon density. The MWDC array needs a large amount of front end electronics followed by a scalable data acquisition system

which are all costly.

Purpose:

The aim is to design a readout scheme which can lower the cost but keep the performance of the array rarely degraded

and to test the system and demonstrate the feasibility of the design.

Methods:

Based on the Flash Analog-to-Digital Converter(ADC) acquisition scheme

a fan-in and delay module has been designed in order to record three signals from X

U and V sense wires simultaneously in each Flash-ADC channel.

Results:

By this means the total number of channels for MWDC is reduced by 60%. The performance of this fan-in and delay module is tested with a MWDC detector using

Fe X-ray source. The amplitude signal and the timing signal are smeared by less than 1% and 500 ps

respectively.

Conclusion:

Both specifications show that the fan-in and delay module can be used in MWDC with the event rate ranging in 1-10kHz.

关键词

Keywords

references

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