Design and application of readout module ZYNQBee with Gigabit Ethernet interface based on ZYNQ

Tao XUE; Jinfu ZHU; Guanghua GONG; Liangjun WEI; Yang LUO; Jianmin LI

doi:10.11889/j.0253-3219.2018.hjs.41.050403

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Design and application of readout module ZYNQBee with Gigabit Ethernet interface based on ZYNQ

NUCLEAR ELECTRONICS AND INSTRUMENTATION | 更新时间：2021-05-19

- Design and application of readout module ZYNQBee with Gigabit Ethernet interface based on ZYNQ
- NUCLEAR TECHNIQUES Vol. 41, Issue 5, Article number: 050403(2018)
- 作者机构：
  
  1.粒子技术与辐射成像教育部重点实验室(清华大学) 北京 100084
  2.清华大学工程物理系北京 100084
  3.同方威视技术股份有限公司北京 100083
- 作者简介：
- 基金信息：
- DOI：10.11889/j.0253-3219.2018.hjs.41.050403
  CLC： TL82
- Received：13 April 2017，
  
  Revised：25 July 2017，
  
  Published：10 May 2018
- 稿件说明：
移动端阅览
Tao XUE, Jinfu ZHU, Guanghua GONG, et al. Design and application of readout module ZYNQBee with Gigabit Ethernet interface based on ZYNQ[J]. Nuclear techniques, 2018, 41(5): 050403
DOI：

Tao XUE, Jinfu ZHU, Guanghua GONG, et al. Design and application of readout module ZYNQBee with Gigabit Ethernet interface based on ZYNQ[J]. Nuclear techniques, 2018, 41(5): 050403 DOI： 10.11889/j.0253-3219.2018.hjs.41.050403.

摘要

ZYNQ是集成了现场可编程阵列（Field-Programmable Gate Array，FPGA）和高性能双核ARM Cortex-A9处理器的全新架构的SoC（System On Chip）。核电子学领域的数据读出方式，从传统的“处理器+FPGA”的双芯片解决方案到目前的ZYNQ单芯片解决方案，不仅有效地减小读出电子学硬件的尺寸和功耗，而且极大地提高FPGA和处理器之间的有效带宽，为整个读出电子学带来了新的发展。介绍了基于ZYNQ XC7Z010单芯片读出模块的研制细节，包括新架构和传统架构的对比，新架构硬件设计细节、难点及性能，其中涉及DDR3（Double Data Rate 3）SDRAM（Synchronous Dynamic Random Access Memory）布线的关键问题、千兆以太网接口以及嵌入式Linux的移植等。最后，介绍ZYNQBee在中国暗物质实验（China Dark matter EXperiment，CDEX）高纯锗探测器数据采集板卡上的应用，测试表明：以太网口的数据读出平均带宽超过了700Mb·s

-1

。

Abstract

Background

Traditional nuclear electronics readout system

like "FPGA+ARM" combination

can not meet requirements of physical experiments in light if the physical size and power consumption. ZYNQ is a new all programmable SoC (System On Chip) architecture of field-programmable gate array (FPGA) with dual-core high performance ARM Cortex-A9 processors from Xilinx.

Purpose

This study aims to develop a ZYNQ based readout module called ZYNQBee

which has lower profile

lower power and higher bandwidth performance between ARM and FPGA.

Methods

The ZYNQ XC7Z010 is employed as the kernel chip to build the ZYNQBee system by overcoming difficulties of hardware and software design including DDR3 (Double Data Rate 3) SDRAM (Synchronous Dynamic Random Access Memory) layout

interface of Gigabit Ethernet

transplant of Embedded Linux and so on.

Results

ZYNQBee has been used as nuclear electronics readout module of the high pure Germanium (HPGe) detector system in CDEX (China Dark matter EXperiment)

and it is tested to have more than 700 Mb·s

-1

Ethernet throughput on average.

Conclusion

ZYNQBee performs better than traditional designs

provides more powerful design flexibilities and functionalities.

关键词

Keywords

references

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