Background: An application specific integrated circuit (ASIC) chip applied to the Multi-anode Photo Multiplier Tubes (MaPMT) readout electronics system for the scintillator neutron detector was developed by the Institute of High Energy Physics (IHEP). It is a key equipment for the General Purpose Powder Diffractometer (GPPD) of China Spallation Neutron Source (CSNS). The chip includes 16 electronic channels

and each channel contains charge pre-amplifier

shaper

discriminator and mono-stable block. Purpose: This study aims to describe the chip design philosophy

verify its functionalities

and obtain its performance parameters. Methods: A circuit board designed for testing the ASIC MaPMT_v10 is implemented as a platform in which the input signals generated in two ways go through the ASIC and are measured at the output nodes of pre-amplifier

shaper and discriminator respectively. We also use one FPGA chip to function as a controller of the circuit and a USB module to communicate with PC for user interface and visualization of measuring results. The shaping waveforms of the simulation signals from the MaPMT are also tested through the test circuit board. Results: The integral nonlinearity (INL) of the MaPMT_v10 is between 0.72%?1.1%. And the value of signal-to-noise ratio (SNR) is 29. The shaped waveforms show that the MaPMT_v10 could distinguish neutron signals from gamma signals easily by setting appropriate threshold. Conclusion: Test results indicate that the chip realizes the function of identifying the particles by the amount of charge. In order to meet the actual needs of the project

the chip will be further optimized and improved on the integration. Abstract