In a large scale accelerator facility

the event timing system is a sophisticated deterministic data broadcasting system

in which signal generator broadcasts timing messages to signal receivers.If the signal receivers can communicate with each other

the timing function and real-time data transfer function can be satisfied in one unified system.Based on this idea

a novel timing system was developed at SSRF to realize the function mentioned above.In this paper

we describe the system structure

hardware design and its specifications

including timing trigger accuracy

timing trigger jitter relative to RF signal and data transfer rate.The system design further attaches special importance to redundant topology structure and fiber length compensation.The system’s preliminary hardware design and laboratory test have been completed.